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花样年华

发表于 14/3/27 17:33:40 |显示全部楼层
Realtek R1000 Mac驱动 支持RTL8101 8102 8103 8168 8169
realtek, 驱动, 支持
Realtek R1000 Mac驱动
支持RTL8101 RTL8102 RTL8103 RTL8168 RTL8169 Mac驱动
3706-RealtekR1000SL_[11.03.2013].zip (308.38 KB, 下载次数: 75, 售价: 3 金钱)
  1. Project by Slice & 8bit

  3. //
  4. // RTL810x Family
  5. //
  6. {"RTL8100E",
  7. MCFG_8100E_1,
  8. 1024,
  9. (RX_FIFO_THRESH_NONE << RxCfgFIFOShift) | (RX_DMA_BURST << RxCfgDMAShift),
  10. 0xff7e1880,
  11. 0,
  12. EFUSE_NOT_SUPPORT},
  13. {"RTL8100E",
  14. MCFG_8100E_2,
  15. 1024,
  16. (RX_FIFO_THRESH_NONE << RxCfgFIFOShift) | (RX_DMA_BURST << RxCfgDMAShift),
  17. 0xff7e1880,
  18. 0,
  19. EFUSE_NOT_SUPPORT},
  20. {"RTL8101E",
  21. MCFG_8101E_1,
  22. 1024,
  23. (RX_FIFO_THRESH_NONE << RxCfgFIFOShift) | (RX_DMA_BURST << RxCfgDMAShift),
  24. 0xff7e1880,
  25. 0,
  26. EFUSE_NOT_SUPPORT},
  27. {"RTL8101E",
  28. MCFG_8101E_2,
  29. 1024,
  30. (RX_FIFO_THRESH_NONE << RxCfgFIFOShift) | (RX_DMA_BURST << RxCfgDMAShift),
  31. 0xff7e1880,
  32. 0,
  33. EFUSE_NOT_SUPPORT},
  34. {"RTL8101E",
  35. MCFG_8101E_3,
  36. 1024,
  37. (RX_FIFO_THRESH_NONE << RxCfgFIFOShift) | (RX_DMA_BURST << RxCfgDMAShift),
  38. 0xff7e1880,
  39. 0,
  40. EFUSE_NOT_SUPPORT},
  41. {"RTL8102E",
  42. MCFG_8102E_1,
  43. 1024,
  44. (RX_FIFO_THRESH_NONE << RxCfgFIFOShift) | (RX_DMA_BURST << RxCfgDMAShift),
  45. 0xff7e1880,
  46. 0,
  47. EFUSE_NOT_SUPPORT},
  48. {"RTL8102E",
  49. MCFG_8102E_2,
  50. 1024,
  51. (RX_FIFO_THRESH_NONE << RxCfgFIFOShift) | (RX_DMA_BURST << RxCfgDMAShift),
  52. 0xff7e1880,
  53. 0,
  54. EFUSE_NOT_SUPPORT},
  55. {"RTL8103E",
  56. MCFG_8103E_1,
  57. 1024,
  58. (RX_FIFO_THRESH_NONE << RxCfgFIFOShift) | (RX_DMA_BURST << RxCfgDMAShift),
  59. 0xff7e1880,
  60. 0,
  61. EFUSE_NOT_SUPPORT},
  62. {"RTL8103E",
  63. MCFG_8103E_2,
  64. 1024,
  65. (RX_FIFO_THRESH_NONE << RxCfgFIFOShift) | (RX_DMA_BURST << RxCfgDMAShift),
  66. 0xff7e1880,
  67. 0,
  68. EFUSE_NOT_SUPPORT},
  69. {"RTL8103E",
  70. MCFG_8103E_3,
  71. 1024,
  72. (RX_FIFO_THRESH_NONE << RxCfgFIFOShift) | (RX_DMA_BURST << RxCfgDMAShift),
  73. 0xff7e1880,
  74. 0,
  75. EFUSE_NOT_SUPPORT},
  76. {"RTL8103E",
  77. MCFG_8105E_1,
  78. 1024,
  79. (RX_FIFO_THRESH_NONE << RxCfgFIFOShift) | (RX_DMA_BURST << RxCfgDMAShift),
  80. 0xff7e1880,
  81. 0,
  82. EFUSE_NOT_SUPPORT},
  83. {"RTL8103E",
  84. MCFG_8105E_2,
  85. 1024,
  86. (RX_FIFO_THRESH_NONE << RxCfgFIFOShift) | (RX_DMA_BURST << RxCfgDMAShift),
  87. 0xff7e1880,
  88. 0,
  89. EFUSE_NOT_SUPPORT},
  90. {"RTL8103E",
  91. MCFG_8105E_3,
  92. 1024,
  93. (RX_FIFO_THRESH_NONE << RxCfgFIFOShift) | (RX_DMA_BURST << RxCfgDMAShift),
  94. 0xff7e1880,
  95. 0,
  96. EFUSE_NOT_SUPPORT},
  97. {"RTL8103E",
  98. MCFG_8105E_4,
  99. 1024,
  100. (RX_FIFO_THRESH_NONE << RxCfgFIFOShift) | (RX_DMA_BURST << RxCfgDMAShift),
  101. 0xff7e1880,
  102. 0,
  103. EFUSE_NOT_SUPPORT},

  105. //
  106. // RTL8168/8111 Family
  107. //
  108. {"RTL8168B/8111B",
  109. MCFG_8168B_1,
  110. 1024,
  111. (RX_FIFO_THRESH_NONE << RxCfgFIFOShift) | (RX_DMA_BURST << RxCfgDMAShift),
  112. 0xff7e1880,
  113. Jumbo_Frame_4k,
  114. EFUSE_NOT_SUPPORT},
  115. {"RTL8168B/8111B",
  116. MCFG_8168B_2,
  117. 1024,
  118. (RX_FIFO_THRESH_NONE << RxCfgFIFOShift) | (RX_DMA_BURST << RxCfgDMAShift),
  119. 0xff7e1880,
  120. Jumbo_Frame_4k,
  121. EFUSE_NOT_SUPPORT},
  122. {"RTL8168B/8111B",
  123. MCFG_8168B_3,
  124. 1024,
  125. (RX_FIFO_THRESH_NONE << RxCfgFIFOShift) | (RX_DMA_BURST << RxCfgDMAShift),
  126. 0xff7e1880,
  127. Jumbo_Frame_4k,
  128. EFUSE_NOT_SUPPORT},
  129. {"RTL8168C/8111C",
  130. MCFG_8168C_1,
  131. 1024,
  132. RxCfg_128_int_en | RxCfg_fet_multi_en | (RX_DMA_BURST << RxCfgDMAShift),
  133. 0xff7e1880,
  134. Jumbo_Frame_6k,
  135. EFUSE_NOT_SUPPORT},
  136. {"RTL8168C/8111C",
  137. MCFG_8168C_2,
  138. 1024,
  139. RxCfg_128_int_en | RxCfg_fet_multi_en | (RX_DMA_BURST << RxCfgDMAShift),
  140. 0xff7e1880,
  141. Jumbo_Frame_6k,
  142. EFUSE_NOT_SUPPORT},
  143. {"RTL8168C/8111C",
  144. MCFG_8168C_3,
  145. 1024,
  146. RxCfg_128_int_en | RxCfg_fet_multi_en | (RX_DMA_BURST << RxCfgDMAShift),
  147. 0xff7e1880,
  148. Jumbo_Frame_6k,
  149. EFUSE_NOT_SUPPORT},
  150. {"RTL8168CP/8111CP",
  151. MCFG_8168CP_1,
  152. 1024,
  153. RxCfg_128_int_en | RxCfg_fet_multi_en | (RX_DMA_BURST << RxCfgDMAShift),
  154. 0xff7e1880,
  155. Jumbo_Frame_6k,
  156. EFUSE_NOT_SUPPORT},
  157. {"RTL8168CP/8111CP",
  158. MCFG_8168CP_2,
  159. 1024,
  160. RxCfg_128_int_en | RxCfg_fet_multi_en | (RX_DMA_BURST << RxCfgDMAShift),
  161. 0xff7e1880,
  162. Jumbo_Frame_6k,
  163. EFUSE_NOT_SUPPORT},
  164. {"RTL8168D/8111D",
  165. MCFG_8168D_1,
  166. 1024,
  167. RxCfg_128_int_en | (RX_DMA_BURST << RxCfgDMAShift),
  168. 0xff7e1880,
  169. Jumbo_Frame_9k,
  170. EFUSE_SUPPORT},
  171. {"RTL8168D/8111D",
  172. MCFG_8168D_2,
  173. 1024,
  174. RxCfg_128_int_en | (RX_DMA_BURST << RxCfgDMAShift),
  175. 0xff7e1880,
  176. Jumbo_Frame_9k,
  177. EFUSE_SUPPORT},
  178. {"RTL8168DP/8111DP",
  179. MCFG_8168DP_1,
  180. 1024,
  181. RxCfg_128_int_en | (RX_DMA_BURST << RxCfgDMAShift),
  182. 0xff7e1880,
  183. Jumbo_Frame_9k,
  184. EFUSE_SUPPORT},
  185. {"RTL8168DP/8111DP",
  186. MCFG_8168DP_2,
  187. 1024,
  188. RxCfg_128_int_en | (RX_DMA_BURST << RxCfgDMAShift),
  189. 0xff7e1880,
  190. Jumbo_Frame_9k,
  191. EFUSE_SUPPORT},
  192. {"RTL8168DP/8111DP",
  193. MCFG_8168DP_2,
  194. 1024,
  195. RxCfg_128_int_en | (RX_DMA_BURST << RxCfgDMAShift),
  196. 0xff7e1880,
  197. Jumbo_Frame_9k,
  198. EFUSE_SUPPORT},
  199. {"RTL8168E/8111E",
  200. MCFG_8168E_1,
  201. 1024,
  202. RxCfg_128_int_en | (RX_DMA_BURST << RxCfgDMAShift),
  203. 0xff7e1880,
  204. Jumbo_Frame_9k,
  205. EFUSE_SUPPORT},
  206. {"RTL8168E/8111E",
  207. MCFG_8168E_2,
  208. 1024,
  209. RxCfg_128_int_en | (RX_DMA_BURST << RxCfgDMAShift),
  210. 0xff7e1880,
  211. Jumbo_Frame_9k,
  212. EFUSE_SUPPORT},
  213. {"RTL8168E-VL/8111E-VL",
  214. MCFG_8168E_VL_1,
  215. 1024,
  216. RxCfg_128_int_en | (RX_DMA_BURST << RxCfgDMAShift),
  217. 0xff7e1880,
  218. Jumbo_Frame_9k,
  219. EFUSE_SUPPORT},
  220. {"RTL8168E-VL/8111E-VL",
  221. MCFG_8168E_VL_2,
  222. 1024,
  223. RxCfg_128_int_en | (RX_DMA_BURST << RxCfgDMAShift),
  224. 0xff7e1880,
  225. Jumbo_Frame_9k,
  226. EFUSE_SUPPORT},
  227. {"RTL8168F/8111F",
  228. MCFG_8168F_1,
  229. 1024,
  230. RxCfg_128_int_en | (RX_DMA_BURST << RxCfgDMAShift),
  231. 0xff7e1880,
  232. Jumbo_Frame_9k,
  233. EFUSE_SUPPORT},
  234. {"RTL8168F/8111F",
  235. MCFG_8168F_2,
  236. 1024,
  237. RxCfg_128_int_en | (RX_DMA_BURST << RxCfgDMAShift),
  238. 0xff7e1880,
  239. Jumbo_Frame_9k},

  241. //
  242. // RTL8169/8110 Family
  243. //
  244. {"RTL8169",
  245. MCFG_8169_1,
  246. 256,
  247. (RX_FIFO_THRESH_NONE << RxCfgFIFOShift) | (RX_DMA_BURST << RxCfgDMAShift),
  248. 0xff7e1880,
  249. Jumbo_Frame_7k,
  250. EFUSE_NOT_SUPPORT},
  251. {"RTL8169S/8110S",
  252. MCFG_8169S_1,
  253. 256,
  254. (RX_FIFO_THRESH_NONE << RxCfgFIFOShift) | (RX_DMA_BURST << RxCfgDMAShift),
  255. 0xff7e1880,
  256. Jumbo_Frame_7k,
  257. EFUSE_NOT_SUPPORT},
  258. {"RTL8169S/8110S",
  259. MCFG_8169S_2,
  260. 256,
  261. (RX_FIFO_THRESH_NONE << RxCfgFIFOShift) | (RX_DMA_BURST << RxCfgDMAShift),
  262. 0xff7e1880,
  263. Jumbo_Frame_7k,
  264. EFUSE_NOT_SUPPORT},
  265. {"RTL8169SB/8110SB",
  266. MCFG_8169SB_1,
  267. 256,
  268. (RX_FIFO_THRESH_NONE << RxCfgFIFOShift) | (RX_DMA_BURST << RxCfgDMAShift),
  269. 0xff7e1880,
  270. Jumbo_Frame_7k,
  271. EFUSE_NOT_SUPPORT},
  272. {"RTL8169SC/8110SC",
  273. MCFG_8169SC_1,
  274. 256,
  275. (RX_FIFO_THRESH_NONE << RxCfgFIFOShift) | (RX_DMA_BURST << RxCfgDMAShift),
  276. 0xff7e1880,
  277. Jumbo_Frame_7k,
  278. EFUSE_NOT_SUPPORT},
  279. {"RTL8169SC/8110SC",
  280. MCFG_8169SC_2,
  281. 256,
  282. (RX_FIFO_THRESH_NONE << RxCfgFIFOShift) | (RX_DMA_BURST << RxCfgDMAShift),
  283. 0xff7e1880,
  284. Jumbo_Frame_7k,
  285. EFUSE_NOT_SUPPORT},

  287. //
  288. // RTL8401
  289. //
  290. {"RTL8401",
  291. MCFG_8401_1,
  292. 1024,
  293. (RX_FIFO_THRESH_NONE << RxCfgFIFOShift) | (RX_DMA_BURST << RxCfgDMAShift),
  294. 0xff7e1880,
  295. 0,
  296. EFUSE_NOT_SUPPORT},
  297. {"RTL8401",
  298. MCFG_8402_1,
  299. 1024,
  300. (RX_FIFO_THRESH_NONE << RxCfgFIFOShift) | (RX_DMA_BURST << RxCfgDMAShift),
  301. 0xff7e1880,
  302. 0,
  303. EFUSE_NOT_SUPPORT},

  305. //
  306. // RTL8411
  307. //
  308. {"RTL8411",
  309. MCFG_8411_1,
  310. 1024,
  311. RxCfg_128_int_en | (RX_DMA_BURST << RxCfgDMAShift),
  312. 0xff7e1880,
  313. Jumbo_Frame_9k,
  314. EFUSE_NOT_SUPPORT},
  315. // *** end of table ***
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